DAQ Firmware
FPGA Golden design
The Golden design is a design which should never changed (excepted if requested by the DAQ expert). It gives the posibility to access the flash of the DAQ FPGA when the user firmware is corrupted (something has gone wrong during programming, a corrupted flash contain for any raison).
| fw version | fw bin file | fw remarks |
|---|---|---|
| 1b50000b | Golden_design_1b50000B.bin | First version |
| 1b50000c | Golden_design_1b50000C.bin | use reprog ICAP with read feasability |
| 1b50000d | Golden_design_1b50000d.bin | update submodule (version to use) |
Note
Normally the DTH_P2 is delivered with the Golden design written at sector (0) of the DTH_P2 DAQ Flash.
DAQ FPGA users design
The MPO connector mapping is detailed in the following document : OTP-231227-XX-ECUO_25Gb (more info on "DAQ Hardware" tab of this web site)
| fw version | fw bin file | fw remarks |
|---|---|---|
| d6100004 | DTH_1SR_1D_T_d6100004.bin | 1 LinkRocket to 1 DAQ |
| d6200007 | DTH_8SR_2D_T_d6200007.bin | Max 4 SlinkRocket to DAQ0 and 4 max to DAQ1 |
Info
The TCDS clock cleaner of the DAQ FPGA has to be reprogrammed when the card is power ON. When it is done, the DAQ FPGA has to be reloaded from the flash.
Note
You can write the user design in the flash using "DTH_Flashy.py --fpga daq". Write it at the sector s256.
TCDS FPGA users design
This firmware should only be used when the DTH is plugged in a node slot.
| fw version | fw bin file | fw remarks |
|---|---|---|
| df100002 | DTH_p2_TCDS_forward_df100002.bin | Forward the TCDS2 to DAQ fpga |
Info
If the DTH contains the TCDS2 firmware, the TCDS2 tool (tcds2_driver) shoud be used to reprogram the flash with this new firmware. Later you will have to use the command below to write the TCDS2 firmare. Contact us if any doubt.
Warning
The firmware versions starting by DTH_p2v1 can only be used for the prototypes.